Filter
Top Products
PCI Backplane and Enclosure
D-4 Copyright © 2003-2007 ARM Limited. All rights reserved. ARM DUI 0224F
D.1.1 Setting the backplane configuration switches
There are four control switches on the PCI backplane board as shown in Figure D-3 on
page D-6. The switches are arranged into two switch blocks, SW1 and SW2.
SW1-1 and SW1-2 control clock rate:
SW1-1 SW1-1 positions are labeled Manual and Auto and select between
manual or automatic clock selection:
•In Manual position, the clock is determined by the settings of the
manual clock select switch SW1-2.
•In Auto position, the clock rate is determined by the capabilities of
the PCI cards installed. The default rate is 33MHz. If however all
PCI cards are capable of functioning at 66MHz, the clock rate will
automatically be increased to 66MHz.
SW1-2 SW1-2 positions are labeled Man1 and Man2 and determine the clock
rate when SW1-1 is in the Manual position. Man1 selects low frequency
(10MHz) and Man2 selects high frequency (50MHz).
Switches SW2-1 and SW2-2 control the PCI backplane JTAG scan chain:
SW2-1 Switch positions for SW2-1 are labeled omitPLD and incPLD and omits
or includes the PLD on the PCI backplane from the PCI scan chain.
SW2-2 Switch positions for SW2-2 are labeled omitPCI and incPCI and omit or
include the PCI sockets in the PCI scan chain. If a PCI card is not present
in a socket, the socket is bypassed by an automatic switch.
If a PCI card does not support JTAG, place a jumper across the TDI and
TDO signals for that card or place insulating tape over the nPRSNT pins
on the socket.
The JTAG scan chain on the PB926EJ-S does not extend to the PCI
backplane.
There are also two connectors on the board that can be connected to external switches:
J6 This connector is paralleled with SW3 and permits control of the power
from a front-panel switch.
J7 This connector is paralleled with SW4 and enables a front-panel switch
to reset the PCI arbiter on the backplane and reset all of the PCI cards.
Note
Front panel switches are not provided as part of the PCI enclosure.