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Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 115
Intel XScale
®
Processor—Intel
®
IXP42X product line and IXC1100 control plane processors
The trace buffer must be initialized prior to its initial usage, then again prior to each
subsequent usage. Initialization is done be reading the entire trace buffer. The process
of reading the trace buffer also clears it out (all entries are set to 0b0000 0000), so
when the trace buffer has been used to capture a trace, the process of reading the
captured trace data also re-initializes the trace buffer for its next usage.
The trace buffer can be used to capture a trace up to a processor reset. A processor
reset disables the trace buffer, but the contents are unaffected. The trace buffer
captures a trace up to the processor reset.
The trace buffer does not capture reset events or debug exceptions.
Since the trace buffer is cleared out before it is used, all entries are initially 0b0000
0000. In fill-once mode, these 0’s can be used to identify the first valid entry in the
trace buffer. In wrap around mode, in addition to identifying the first valid entry, these
0 entries can be used to determine whether a wrap around occurred.
As the trace buffer is read, the oldest entries are read first. Reading a series of 5 (or
more) consecutive “0b0000 0000” entries in the oldest entries indicates that the trace
buffer has not wrapped around and the first valid entry will be the first non-zero entry
read out.
Reading 4 or less consecutive “0b0000 0000” entries requires a bit more intelligence in
the host SW. The host SW must determine whether these 0s are part of the address of
an indirect branch message, or whether they are part of the “0b0000 0000” that the
trace buffer was initialized with. If the first non-zero message byte is an indirect branch
message, then these 0s are part of the address since the address is always read before
the indirect branch message (see “Address Bytes” on page 113). If the first non-zero
entry is any other type of message byte, then these 0s indicate that the trace buffer
has not wrapped around and that first non-zero entry is the start of the trace.
If the oldest entry from the trace buffer is non-zero, then the trace buffer has either
wrapped around or just filled up.
Once the trace buffer has been read and parsed, the host SW should re-create the
trace history from oldest trace buffer entry to latest. Trying to re-create the trace going
backwards from the latest trace buffer entry may not work in most cases, because once
a branch message is encountered, it may not be possible to determine the source of
the branch.
In fill-once mode, the return from the debug handler to the application should generate
an indirect branch message. The address placed in the trace buffer will be that of the
target application instruction. Using this as a starting point, re-creating a trace going
forward in time should be straightforward.
In wrap around mode, the host SW should use the checkpoint registers and address
bytes from indirect branch entries to re-create the trace going forward. The drawback
is that some of the oldest entries in the trace buffer may be untraceable, depending on
where the earliest checkpoint (or indirect branch entry) is located. The best case is
when the oldest entry in the trace buffer was check-pointed, so the entire trace buffer
can be used to re-create the trace. The worst case is when the first checkpoint is in the
middle of the trace buffer and no indirect branch messages exist before this checkpoint.
In this case, the host SW would have to start at its known address (the first
checkpoint) which is half way through the buffer and work forward from there.