Intel IXP42X Personal Computer User Manual


 
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 229
PCI Controller—Intel
®
IXP42X product line and IXC1100 control plane processors
6.6.5 Initiated Type-1 Write Transaction
The following transaction is a PCI Configuration Write working-site Cycle initiated from
the IXP42X product line and IXC1100 control plane processors. This diagram is to
understand the inner workings of PCI transfers and may not reflect actual operation of
the PCI Controller implemented on the IXP42X product line and IXC1100 control plane
processors. The transaction is initiated to PCI bus segment 5, Device number 3,
Function number 7, and Base Address Register 0.
This configuration cycle is a Type 1 configuration cycle and is intended for another PCI
bus segment. Binary 01 — being located in bits 1:0 of the PCI_AD bus during the
address phase — denotes a Type 1 PCI Configuration cycle. A hexadecimal value of 0xB
— written on the PCI_C/BE_N bus during the address phase — signifies that this is a
PCI Bus Configuration Write Cycle.
Due to the fact that the access is on another PCI Bus Segment, the PCI_TRDY_N signal
may take longer to respond and therefore may be extended by several clocks and is not
shown here.
6.6.6 Initiated Memory Read Transaction
The following transaction is a PCI Memory Read Cycle initiated from the IXP42X product
line and IXC1100 control plane processors. This diagram is to understand the inner
workings of PCI transfers and may not reflect actual operation of the PCI Controller
implemented on the IXP42X product line and IXC1100 control plane processors. The
transaction is initiated to address location hexadecimal 0x00000014. The value of
binary 00 in PCI_AD (1:0) indicates that this is a linear increment transfer type.
A hexadecimal value of 0x6 — written on the PCI_C/BE_N bus during the address
phase — signifies that this is a PCI Bus Memory Read Cycle. All byte enables are
asserted for the transaction.
Figure 38. Initiated PCI Type-1 Configuration Write Cycle
PCI_CLK
PCI_FRAME_N
PCI_AD (31:0)
PCI_IDSEL
PCI_C/BE_N
PCI_IRDY_N
PCI_TRDY_N
PCI_DEVSEL_N
0x00028F91 DAT
A
0xB 0x0
INT_REQ_N
INT_GNT_N