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Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 43
Overview of Product Line—Intel
®
IXP42X product line and IXC1100 control plane processors
For more information on the timers, see Section 14.0, “Timers” on page 408.
2.16 JTAG
Testability is supported on the IXP42X product line and IXC1100 control plane
processors through the Test Access Port (TAP) Controller implementation, which is
based on IEEE 1149.1 (JTAG) Standard Test Access Port and Boundary-Scan
Architecture. The purpose of the TAP controller is to support test logic internal and
external to the IXP42X product line and IXC1100 control plane processors, such as
built-in self test and boundary scan.
For more information on JTAG, see Section 20.0, “JTAG Interface” on page 548.
§ §
• Watch-Dog Timer • Timestamp Timer • Two general-purpose
timers