Intel IXP42X Personal Computer User Manual


 
Intel
®
IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB)
v1.1 Device Controller
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
480 Order Number: 252480-006US
A control register enables the UDC and masks the interrupt sources in the UDC. A
status register indicates the state of the interrupt sources. Each of the 16 endpoints
(control, OUT, and IN) have a control or status register. Endpoint 0 (control) has an
address for the 16-by-8 data FIFO that can be used to transmit and receive data.
Endpoint 0 also has a write count register that is used to determine the number of
bytes the USB host controller has sent to Endpoint 0.
Table 172. USB-Device Register Descriptions (Sheet 1 of 2)
Address Name Description
0 x C800 B000 UDCCR UDC Control Register
0 x C800 B004 Reserved Reserved for Future Use
0 x C800 B008 Reserved Reserved for Future Use
0 x C800 B00C Reserved Reserved for Future Use
0 x C800 B010 UDCCS0 UDC Endpoint 0 Control/Status Register
0 x C800 B014 UDCCS1 UDC Endpoint 1 (IN) Control/Status Register
0 x C800 B018 UDCCS2 UDC Endpoint 2 (OUT) Control/Status Register
0 x C800 B01C UDCCS3 UDC Endpoint 3 (IN) Control/Status Register
0 x C800 B020 UDCCS4 UDC Endpoint 4 (OUT) Control/Status Register
0 x C800 B024 UDCCS5 UDC Endpoint 5 (Interrupt) Control/Status Register
0 x C800 B028 UDCCS6 UDC Endpoint 6 (IN) Control/Status Register
0 x C800 B02C UDCCS7 UDC Endpoint 7 (OUT) Control/Status Register
0 x C800 B030 UDCCS8 UDC Endpoint 8 (IN) Control/Status Register
0 x C800 B034 UDCCS9 UDC Endpoint 9 (OUT) Control/Status Register
0 x C800 B038 UDCCS10 UDC Endpoint 10 (Interrupt) Control/Status Register
0 x C800 B03C UDCCS11 UDC Endpoint 11 (IN) Control/Status Register
0 x C800 B040 UDCCS12 UDC Endpoint 12 (OUT) Control/Status Register
0 x C800 B044 UDCCS13 UDC Endpoint 13 (IN) Control/Status Register
0 x C800 B048 UDCCS14 UDC Endpoint 14 (OUT) Control/Status Register
0 x C800 B04C UDCCS15 UDC Endpoint 15 (Interrupt) Control/Status Register
0 x C800 B050 UICR0 UDC Interrupt Control Register 0
0 x C800 B054 UICR1 UDC Interrupt Control Register 1
0 x C800 B058 UISR0 UDC Status Interrupt Register 0
0 x C800 B05C UISR1 UDC Status Interrupt Register 1
0 x C800 B060 UFNHR UDC Frame Number Register High
0 x C800 B064 UFNLR UDC Frame Number Register Low
0 x C800 B068 UBC2 UDC Byte Count Register 2
0 x C800 B06C UBC4 UDC Byte Count Register 4
0 x C800 B070 UBC7 UDC Byte Count Register 7
0 x C800 B074 UBC9 UDC Byte Count Register 9
0 x C800 B078 UBC12 UDC Byte Count Register 12
0 x C800 B07C UBC14 UDC Byte Count Register 14
0 x C800 B080 UDDR0 UDC Endpoint 0 Data Register
0 x C800 B100 UDDR1 UDC Endpoint 1 Data Register
0 x C800 B180 UDDR2 UDC Endpoint 2 Data Register