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Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 479
Universal Serial Bus (USB) v1.1 Device Controller—Intel
®
IXP42X product line and IXC1100
control plane processors
When the device responds to the host, it must specify a legal USB configuration. For
example, if the device specifies a configuration of six isochronous endpoints of
256 bytes each, the host is not able to schedule the proper bandwidth and does not
take the UDC out of Configuration 0. The user device determines which endpoints to
report to the host. If an endpoint is not reported, it is not used.
Another option, attractive — for use with isochronous endpoints — is to describe a
configuration of a packet with a maximum size less than 256 bytes to the host. For
example, if software responds to the GET_DESCRIPTOR command that Endpoint 3 only
supports 64 bytes maximum packet isochronous IN data, the user device must set the
UDCCS3[TSP] bit after it loads 64 bytes for transmission. Similarly, if Endpoint 4 is
described as supporting 128 bytes maximum packet Isochronous OUT data, the UDC
recognizes the end of the packet, sets UDCCS4[RPC], and an interrupt is generated.
The direction of the endpoints is fixed. Physically, the UDC only supports interrupt
endpoints with a maximum packet size of 8 bytes or less, bulk endpoints with a
maximum packet size of 64 bytes or less, and isochronous endpoints with a maximum
packet size of 256 bytes or less.
To make the Intel
®
IXP42X product line and IXC1100 control plane processors more
adaptable, the UDC supports a total of four configurations. Each of these configurations
are identical in the UDC, software can make three distinct configurations, each with two
interfaces. Configuration 0 is a default configuration of Endpoint 0 and can not be used
in any other configuration.
After the host completes a SET_CONFIGURATION or SET_INTERFACE command, the
software must decode the command to empty the OUT endpoint FIFOs and allow the
Intel XScale
®
processor to set up the proper power/peripheral configurations.
18.4 UDC Hardware Connections
This section explains how to connect the USB interface for a variety of devices.
18.4.1 Self-Powered Device
The IXP42X product line and IXC1100 control plane processors do not implement any
low-power modes of operation. Therefore, the UDC can be connected to act as a full-
speed device in a permanent configuration by pulling the USB_D+ signal to a logic
high.
The USB_D+ signals should be pulled high by the 5-V signal received over the USB
connector. The ground received from the USB connector should be tied to the ground of
the board.
18.4.2 Bus-Powered Devices
The IXP42X product line and IXC1100 control plane processors do not support bus-
powered devices because it is required to consume less that 500 µA when the USB host
issues a suspend. (See Section 7.2.3 of the USB Specification, version 1.1.) The
IXP42X product line and IXC1100 control plane processors cannot limit the amount of
current it consumes to 500 µA.
18.5 Register Descriptions
All configuration, request/service, and status reporting is controlled by the USB host
controller and is communicated to the UDC via the USB. The UDC has registers that
control the interface between the UDC and the software.