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©2008 Advanced Micro Devices, Inc.
Real Time Clock (RTC)
AMD SB600 Register Reference Manual Proprietary Page 292
Hours - RW – 8 bits - [RTC_Reg: 04h]
Field Name Bits Default Description
Hours register
Hours Alarm- RW – 8 bits - [RTC_Reg: 05h]
Field Name Bits Default Description
Hours Alarm 7:0 00h Binary-Code-Decimal format.
If SET bit = 1, Hours Alarm Register will never match with
Hours Register, else
If bits [7:6] = [11], Hours Alarm Register always matches with
Hours Register.
Hours Alarm register
Day of Week - RW – 8 bits - [RTC_Reg: 06h]
Field Name Bits Default Description
Day of Week 7:0 00h Binary-Code-Decimal format. Range: 01 – 07 (Sunday = 1).
No leap year correction capability. Leap year correction has to
be done by software.
This register can be set by a software (SET bit of Register B =
1) or can be automatically updated by hardware everyday.
When set by software, hardware updating is disabled.
Day of Week register
Date of Month - RW – 8 bits - [RTC_Reg: 07h]
Field Name Bits Default Description
Date of Month 7:0 00h Binary-Code-Decimal format. Range: 01 – 28 for February
and no leap year capability. Leap year correction has to be
done by software.
This register can be set by software (SET bit of Register B = 1)
or can be automatically updated by hardware everyday. When
set by software, hardware updating is disabled.
Date of Month register
Month - RW – 8 bits - [RTC_Reg: 08h]
Field Name Bits Default Description
Month 7:0 00h Binary-Code-Decimal format. Range: 01 – 12. No leap year
correction capability. Leap year correction has to be done by
software.
This register can be set by software (SET bit of Register B = 1)
or can be automatically updated by hardware every month.
When set by software, hardware updating is disabled.
Month register
Year - RW – 8 bits - [RTC_Reg: 09h]
Field Name Bits Default Description
Year 7:0 00h Binary-Code-Decimal format. Range: 00 – 99. No leap year
correction capability. Leap year correction has to be done by
software.
This register can be set by software (SET bit of Register B = 1)
or can be automatically updated by hardware every year.
When set by software, hardware updating is disabled.
Year register
Register A - RW – 8 bits - [RTC_Reg: 0Ah]
Field Name Bits Default Description
Rate Selection(RS0) 0 0b These four rate-selection bits select one of the 13 taps on the