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IXP42X product line and IXC1100 control plane processors—Intel XScale
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Intel
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IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
158 Order Number: 252480-006US
If a system design precludes events that could cause external aborts, then such
precautions are not necessary.
Multiple Data Aborts
Multiple data aborts may be detected by hardware but only the highest priority one will
be reported. If the reported data abort is precise, software can correct the cause of the
abort and re-execute the aborted instruction. If the lower priority abort still exists, it
will be reported. Software can handle each abort separately until the instruction
successfully executes.
If the reported data abort is imprecise, software needs to check the SPSR to see if the
previous context was executing in abort mode. If this is the case, the link back to the
current process has been lost and the data abort is unrecoverable.
3.8.3.4.5 Events from Preload Instructions
A PLD instruction will never cause the Data MMU to fault for any of the following
reasons:
• Domain Fault
• Permission Fault
• Translation Fault
If execution of the PLD would cause one of the above faults, then the PLD causes no
effect.
This feature allows software to issue PLDs speculatively. For example, Example 19 on
page 159 places a PLD instruction early in the loop. This PLD is used to fetch data for
the next loop iteration. In this example, the list is terminated with a node that has a
null pointer. When execution reaches the end of the list, the PLD on address 0x0 will
not cause a fault. Rather, it will be ignored and the loop will terminate normally.
Example 18. Shielding Code from Potential Imprecise Aborts
;; Example of code that maintains architectural state through the
;; window where an imprecise fault might occur.
LD R0, [R1] ; R1 points to stall-until-complete
; region of memory
NOP
NOP
NOP
; Code beyond this point is guaranteed not to see any aborts
; from the LD.