Intel IXC1100 Personal Computer User Manual


 
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 533
Universal Serial Bus (USB) v1.1 Device Controller—Intel
®
IXP42X product line and IXC1100
control plane processors
18.5.38 UDC Data Register 8 (UDDR8)
Endpoint 8 is a double-buffered, isochronous IN endpoint that is 256 bytes deep. Data
can be loaded via direct Intel XScale
®
processor writes.
Because it-is double buffered, up to two packets of data may be loaded for
transmission.
18.5.39 UDC Data Register 9 (UDDR9)
Endpoint 9 is a double-buffered, isochronous OUT endpoint that is 256 bytes deep. The
UDC generates an interrupt request when the EOP is received.
Register Name: UDDR7
Hex Offset Address: 0 x C800B680 Reset Hex Value: 0x00000000
Register
Description:
Universal Serial Bus Device Endpoint 7 Data Register
Access: Read
Bits
31 87 0
(Reserved) (8-Bit Data)
X 00000000
Resets (Above)
Register
UDDR7
Bits Name Description
31:8 Reserved for future use.
7:0 DATA Top of endpoint data currently being read.
Register Name: UDDR8
Hex Offset Address: 0 x C800B700 Reset Hex Value: 0x00000000
Register
Description:
Universal Serial Bus Device Endpoint 8 Data Register
Access: Write
Bits
31 87 0
(Reserved) (8-Bit Data)
X 00000000
Resets (Above)
Register
UDDR8
Bits Name Description
31:8 Reserved for future use.
7:0 DATA Top of endpoint data currently being loaded.