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Intel
®
IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
324 Order Number: 252480-006US
Once the boot sequence completes this bit is written to a ‘0,’ switching the default
system memory map to place the SDRAM controller at address 0x00000000 to
0x0FFFFFFF. The Expansion Bus Controller now resides at address 0x50000000 to
0x5FFFFFFF. Weak pull-up resistors are placed on each expansion-bus address pin.
Note that the Intel XScale processor can operate at slower speeds than the factory
programmed speed setting. This is done by placing a value on Expansion bus address
bits 23,22,21 at the de-assertion of RESET_IN_N and knowing the speed grade of the
part from the factory. Column 1 above denotes the speed grade of the part from the
factory. Column 2, 3, and 4 denotes the values captured on the Expansion Bus address
bits at the de-assertion of reset. Column 5 represents the speed at which the Intel
XScale processor speed will now be operating at.
8.9.9.1 User-Configurable Field
On the IXP42X product line and IXC1100 control plane processors, the expansion bus
address lines for the user-configurable bit-field are internally pulled up. Users may then
change the values by adding weak pull-down resistors (~10KΩ). Switches can also be
used so that changeable values are available for the user configuration bits.
The user-defined bit-field can be used in many ways. For example, this field could be
used for board-revision identification; a series of board revisions may be made over the
course of development. To indicate a particular board revision, one of the 16 possible
values can be encoded using hardware configuration as stated above. Another potential
use for this field would be to predefine a set of values to indicate a particular board
configuration — for example, one with a different set of devices and memory map.
Many other creative options, not identified in this document, are possible.
8.9.10 Configuration Register 1
One additional configuration register is defined within the Expansion Bus Controller for
use by the IXP42X product line and IXC1100 control plane processors.
Table 125. Intel XScale
®
Processor Speed Expansion Bus Configuration Strappings
Intel XScale
®
Processor Speed
(Factory Part
Speed)
CFG_EN_N
EX_ADDR(23)
CFG1
EX_ADDR(22)
CFGO
EX_ADDR(21)
Actual Core
Speed (MHz)
533 MHz 1 0 0 533 MHz
533 MHz 0 0 0 533 MHz
533 MHz 0 0 1 400 MHz
533 MHz 0 1 1 266 MHz
400 MHz 1 0 0 400 MHz
400 MHz 0 0 0 400 MHz
400 MHz 0 0 1 400 MHz
400 MHz 0 1 1 266 MHz
266 MHz 1 0 0 266 MHz
266 MHz 0 0 0 266 MHz
266 MHz 0 0 1 266 MHz
266 MHz 0 1 1 266 MHz