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Intel
®
IXP42X product line and IXC1100 control plane processors—PCI Controller
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
DM September 2006
266 Order Number: 252480-006US
6.14.2.12 AHB Memory Base Address Register
(PCI_AHBMEMBASE)
6.14.2.13 AHB I/O Base Address Register
(PCI_AHBIOBASE)
4APDC0
AHB to PCI DMA complete for buffer 0. Set to a 1
when the DMA transfer specified by the
pci_atpdma0_xxx registers is complete or terminated
due to an error. If the APDCEN bit is a 1, the
pcc_atpdma_int output is asserted high.
0RORW1C
3:1 (Reserved) – Read as 0 000 RO RO
0 APDCEN
AHB to PCI DMA Complete interrupt enable. If this bit
is set and either APDC0 or APDC1 are 1, the
pcc_atpdma_int output is asserted active high.
0RORW
Register Name: PCI_AHBMEMBASE
Hex Offset Address: 0xC000002C Reset Hex Value: 0xc0000000
Register
Description:
Provides upper 8 AHB address bits for PCI accesses of AHB bus. Lower 24 bits of AHB address provided
directly from PCI bus. Four AHBbase fields correspond to accesses from the PCI bus that target
addresses in PCI configuration base address registers pci_bar0/1/2/3.
Access: See below.
31 24 23 16 15 8 7 0
AHBbase0 AHBbase1 AHBbase2 AHBbase3
Register
PCI_AHBMEMBASE
Bits Name Description
Reset
Value
PCI Access AHB Access
31:2
4
AHBbase0
Upper 8 AHB address bits for PCI accesses that target
pci_bar0. By default this register maps to an upper
region of the AHB memory map.
0xc0 RO RW
23:1
6
AHBbase1
Upper 8 AHB address bits for PCI accesses that target
pci_bar1.
0x00 RO RW
15:8 AHBbase2
Upper 8 AHB address bits for PCI accesses that target
pci_bar2.
0x00 RO RW
7:0 AHBbase3
Upper 8 AHB address bits for PCI accesses that target
pci_bar3.
0x00 RO RW
Register Name: PCI_AHBIOBASE
Hex Offset Address: 0xC0000030 Reset Hex Value: 0x00000000
Register
Description:
Provides upper 24 AHB address bits for PCI accesses of AHB I/O space. Lower 8 bits of AHB address
provided directly from PCI bus.
Access: See below.
31 24 23 16 15 0
(Reserved) IObase
Register
PCI_DMACTRL (Sheet 2 of 2)
Bits Name Description
Reset
Value
PCI Access AHB Access