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Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
September 2006 DM
Order Number: 252480-006US 27
Introduction—Intel
®
IXP42X product line and IXC1100 control plane processors
1.3.2 Acronyms and Terminology
Table 1. Acronyms and Terminology
Acronym/
Terminology
Description
AAL ATM Adaptation Layers
AES Advanced Encryption Standard
AHB Advanced High-Performance Bus
APB Advanced Peripheral Bus
API Application Program Interface
ARBS South Arbiter
Assert The logically active value of a signal or bit.
ATM-TC Asynchronous Transmission Mode – Transmission Convergence
AQM AHB Queue Manager
BTB Branch Target Buffer
Clean
An operation that updates external memory with the contents of the specified line in the
data/mini-data cache if any of the dirty bits are set and the line is valid. There are two
dirty bits associated with each line in the cache so only the portion that is dirty will get
written back to external memory.
After this operation, the line is still valid and both dirty bits are deasserted.
Coalescing
Bringing together a new store operation with an existing store operation already resident
in the write buffer. The new store is placed in the same write buffer entry as an existing
store when the address of the new store falls in the four-word, aligned address of the
existing entry. This includes, in PCI terminology, write merging, write collapsing, and write
combining.
CRC Cyclical Redundancy Check
FCS Frame-Check Sequence
Deassert The logically inactive value of a signal or bit.
DMA Direct Memory Access
DSP Digital Signal Processor
E1 Euro 1 trunk line
FIFO First In First Out
Flush
An operation that invalidates the location(s) in the cache by de-asserting the valid bit.
Individual entries (lines) may be flushed or the entire cache may be flushed with one
command. Once an entry is flushed in the cache it can no longer be used by the program.
GCI General Circuit Interface
GPIO General-purpose input/output
G.SHDSL ITU G series specification for Single-Pair HDSL
HDLC High-level Data Link Control
HDSL High-Bit-Rate Digital Subscriber Line
HDSL2 High-Bit-Rate Digital Subscriber Line, Version 2
HEC Head-Error Correction
HPI (Texas Instrument) Host Port Interfaces
HSS High-Speed Serial (port)
ISDN Integrated Services Digital Network
IOM ISDN Orientated Modular
LFSR Linear Feedback Shift Register
LSb Least-Significant bit