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Developer’s Manual March, 2003 13-17
Intel
®
80200 Processor based on Intel
®
XScale
™
Microarchitecture
Software Debug
13.11 Debug JTAG Access
There are four JTAG instructions used by the debugger during software debug: LDIC, SELDCSR,
DBGTX and DBGRX. LDIC is described in Section 13.14, Downloading Code in the ICache. The
other three JTAG instructions are described in this section.
SELDCSR, DBGTX and DBGRX use a common 36-bit shift register (DBG_SR). New data is
shifted in and captured data out through the DBG_SR. In the UPDATE_DR state, the new data
shifted into the appropriate data register.
13.11.1 SELDCSR JTAG Command
The ‘SELDCSR’ JTAG instruction selects the DCSR JTAG data register. The JTAG opcode is
‘01001’. When the SELDCSR JTAG instruction is in the JTAG instruction register, the debugger
can directly access the Debug Control and Status Register (DCSR). The debugger can only modify
certain bits through JTAG, but can read the entire register.
The SELDCSR instruction also allows the debugger to generate an external debug break.