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B-14 March, 2003 Developer’s Manual
Intel
®
80200 Processor based on Intel
®
XScale
™
Microarchitecture
Optimization Guide
B.3.3 Optimizing the Use of Immediate Values
The Intel
®
80200 processor MOV or MVN instruction should be used when loading an immediate
(constant) value into a register. Please refer to the ARM Architecture Reference Manual for the set
of immediate values that can be used in a MOV or MVN instruction. It is also possible to generate
a whole set of constant values using a combination of MOV, MVN, ORR, BIC, and ADD
instructions. The LDR instruction has the potential of incurring a cache miss in addition to
polluting the data and instruction caches. The code samples below illustrate cases when a
combination of the above instructions can be used to set a register to a constant value:
;Set the value of r0 to 127
mov r0, #127
;Set the value of r0 to 0xfffffefb.
mvn r0, #260
;Set the value of r0 to 257
mov r0, #1
orr r0, r0, #256
;Set the value of r0 to 0x51f
mov r0, #0x1f
orr r0, r0, #0x500
;Set the value of r0 to 0xf100ffff
mvn r0, #0xff, 16
bic r0, r0, #0xe, 8
; Set the value of r0 to 0x12341234
mov r0, #0x8d, 30
orr r0, r0, #0x1, 20
add r0, r0, r0, LSL #16 ; shifter delay of 1 cycle
Note that it is possible to load any 32-bit value into a register using a sequence of four instructions.