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Developer’s Manual March, 2003 A-1
Compatibility: Intel
®
80200 Processor
vs. SA-110 A
This appendix highlights the differences between the first generation Intel
®
StrongARM*
technology (SA-110) and the Intel
®
80200 processor based on Intel
®
XScale
™
microarchitecture
(compliant with the ARM* Architecture V5TE).
A.1 Introduction
The Intel
®
80200 processor architecture has been defined to be compatible with SA-110 where
possible, however, there are some features not supported on the Intel
®
80200 processor or the
definition of them has been modified. The following sections discuss these deviations.
A programmer who is developing an application for SA-110 and wishes to migrate to the Intel
®
80200 processor must be aware of these architecture differences. Use of these architecture features
should be avoided or isolated in developing the application so that migrating to the Intel
®
80200
processor can occur with minimal effort.
A.2 Summary
Various features of the SA-110 and the Intel
®
80200 processor are outlined in this section.
Subsequent sections give more details.
Feature SA-110
Intel
®
80200
Processor
Intel Extensions
40-bit accumulator access instructions (MRA, MAR) •
Cache preload (PLD) •
New multiply instructions for packed data (MIA, MIAPH, MIAxy) •
New Load/Store Consecutive (LDRD/STRD) •
ARM v5
Sticky overflow flag in SPSR for saturated math •
DSP extensions (SMLAxy, SMLAWy, SMLALxy, SMULxy, SMULWy, QADD,
QDADD, QSUB, QDSUB, CLZ)
•
ARM* / Thumb* transfer instructions •
Thumb •
Floating Point Instructions
Tiny pages •
26-bit code •
Big Endian ••
Little Endian ••