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CHAPTER 4 BUS INTERFACE
4.4 Area Select Register (ASR) and Area Mask Register (AMR)
The area select registers (ASR1 to ASR5) and area mask registers (AMR1 to AMR5)
specify the range of address space for chip select areas 1 to 5.
■
Configuration of Area Select Register (ASR) and Area Mask Register (AMR)
The area select register (ASR) and area mask register (AMR) are configured as shown below.
❍
Area select registers (ASR1 to ASR5)
❍
Area mask registers (AMR1 to AMR5)
15 14 13 12 2 1 0
ASR1
Address: 0000060C
H
A31 A30 A29 A18 A17 A16 0001
H
W
15 14 13 12 2 1 0
ASR2
Address: 00000610
H
A31 A30 A29 A18 A17 A16 0002
H
W
15 14 13 12 2 1 0
ASR3
Address: 00000614
H
A31 A30 A29 A18 A17 A16 0003
H
W
15 14 13 12 2 1 0
ASR4
Address: 00000618
H
A31 A30 A29 A18 A17 A16 0004
H
W
15 14 13 12 2 1 0
ASR5
Address: 0000061C
H
A31 A30 A29 A18 A17 A16 0005
H
W
Initial value
Initial value
Initial value
Initial value
Initial value
Access
Access
Access
Access
Access
15 14 13 12 2 1 0
AMR1
Address: 0000060E
H
A31 A30 A29 A18 A17 A16 0000
H
W
15 14 13 12 2 1 0
AMR2
0612
H
A31 A30 A29 A18 A17 A16 0000
H
W
15 14 13 12 2 1 0
AMR3
0616
H
A31 A30 A29 A18 A17 A16 0000
H
W
15 14 13 12 2 1 0
AMR4
061A
H
A31 A30 A29 A18 A17 A16 0000
H
W
15 14 13 12 2 1 0
AMR5
061E
H
A31 A30 A29 A18 A17 A16 0000
H
W
Access
Access
Access
Access
Access
Initial value
Initial value
Initial value
Initial value
Initial value
Address: 0000
Address: 0000
Address: 0000
Address: 0000