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8.7 Hold Request Cancel Request
8.7 Hold Request Cancel Request
For processing a high-priority interrupt while the CPU is in hold state, cancellation of
the hold request must be requested from the source for the hold request. The interrupt
level used to determine whether to issue a cancel request must be set in the HRCL
register.
■
Criteria for Determining Whether to Issue a Hold Request Cancel Request
When an interrupt cause having a higher level than that set in the HRCL register is generated, a
hold request cancel request is issued.
A cancel request remains valid and DMA transfer remains suppressed unless the interrupt
cause triggering the cancel request is cleared. To prevent this problem, clear the corresponding
interrupt cause.
■
Interrupt Levels for which a Hold Request Cancel Request is Available
The values that can be set in the HRCL register range from 10000
B
to 11111
B
, as with the ICR
register.
When 11111
B
is set, a cancel request is issued for every interrupt level. When 10000
B
is set, a
cancel request is issued only for NMI.
Table 8.7-1 lists the settings for the interrupt levels for which a hold request cancel request is
issued.
After the HRCL register is reset, hold requests for all interrupt levels are canceled.
In this situation, DMA transfer is not performed if interrupts occur, and so set the HRCL register
value should be set to the appropriate value.
Interrupt level set in the HRCL register
@
Interrupt level after priority check
A cancel request is issued
Interrupt level set in the HRCL register
@
Interrupt level after priority check
No cancel request is issued
Table 8.7-1 Settings for the Interrupt Levels for which a Hold Request Cancel Request is
Issued
HRCL register Interrupt levels for which a hold request cancel request is issued
16 NMI only
17 NMI and interrupt level 16
18 NMI, and interrupt levels 16 and 17
31 NMI, and interrupt levels 16 to 30 (initial value)