Fujitsu FR30 Computer Hardware User Manual


 
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CHAPTER 15 DMAC
15.7 Output of Transfer Request Acknowledgment and Transfer
End signals
Channels 0, 1, and 2 have a function that outputs transfer request acknowledgment
and transfer end signals from the corresponding pins.
When a transfer request input from the pin is received and DMA transfer is performed,
the DMAC outputs a transfer request acknowledgment signal.
When the transfer request input from the pin is received, DMA transfer is performed.
When the DMACT counter is reset to 0, the transfer is ended and the DMAC outputs a
transfer end signal.
Output of Transfer Request Acknowledgment Signal
The transfer request acknowledgment signal is an active low pulse to be output after access to
transfer data. The AKSn and AKDn bits of the DATCR specify whether to output the signal
synchronously with access to the transfer source or destination or both.
Output of Transfer End Signal
The transfer end signal is an active low pulse to be output after access to the last transfer data.
The EPSn and EPDn bits of the DATCR specify whether to output the signal synchronously with
access to the transfer source or destination or both.