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APPENDIX E Instructions
(Notes)
• LDM0 (reglist) and LDM1 (reglist) have a*(n-1) +b+1 execution cycles when the specified
number of registers is n.
• STM0 (reglist) and STM1 (reglist) have a*n+1 execution cycles when the specified number of
registers is n.
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20-Bit Standard Branch Macro Instructions
Table E.1-14 20-Bit Standard Branch Macro Instructions
Mnemonic Operation Remarks
*CALL20 label20,Ri Next instruction address-->RP,
label20-->PC
Ri:Temporary register (See Reference 1.)
*BRA20 label20,Ri
*BEQ20 label20,Ri
label20-->PC
if(Z==1) then label20-->PC
Ri:Temporary register (See Reference 2.)
Ri:Temporary register (See Reference 3.)
*BNE20 label20,Ri
*BC20 label20,Ri
*BNC20 label20,Ri
*BN20 label20,Ri
*BP20 label20,Ri
*BV20 label20,Ri
*BNV20 label20,Ri
*BLT20 label20,Ri
*BGE20 label20,Ri
*BLE20 label20,Ri
*BGT20 label20,Ri
*BLS20 label20,Ri
*BHI20 label20,Ri
s/Z==0
s/C==1
s/C==0
s/N==1
s/N==0
s/V==1
s/V==0
s/V xor N==1
s/V xor N==0
s/(V xor N) or Z==1
s/(V xor N) or Z==0
s/C or Z==1
s/C or Z==0
[Reference 1] CALL20
1) When label20-PC-2 is from -0x800 to +0x7fe, an instruction is created as follows:
CALL label12
2) When label20-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:20 #label20,Ri
CALL @Ri
[Reference 2] BRA20
1) When label20-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
BRA label9
2) When label20-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:20 #label20,Ri
JMP @Ri
[Reference 3] Bcc20
1) When label20-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
Bcc label9