4
CHAPTER 1 OVERVIEW
conversion
• Starting: Selectable from software, external trigger, and internal timer
❍
Reload timer
• 16-bit timer: Three channels
• Internal clock: 2-clock cycle resolution. Selectable from 2-, 8-, and 32-frequency division
mode
❍
Other interval timers
• 16-bit timer: Three channels (U-Timer)
• PWM timer: Four channels
• Watchdog timer: One channel
❍
Bit search module
• Searches for the bit position that first changes between 1 and 0 beginning from MSB of a
word in one cycle.
❍
Interrupt controller
• External interrupt input: Nonmaskable interrupt, normal interrupt × 4 (INT0 to INT3)
• Internal interrupt causes: UART, DMAC, A/D, reload timer, PWM, UTIMER, and delayed
interrupt
• Up to 16 priority levels are programmable for interrupts other than nonmaskable interrupts.
❍
Reset types
• Power-on reset, watchdog timer reset, software reset, and external reset
❍
Power save mode
• Sleep/stop mode
❍
Clock control
• Gear function: Desired operating clock frequencies can be set for the CPU and peripherals
independently.
A gear clock can be selected from 1/1, 1/2, 1/4, and 1/8 (or 1/2, 1/4, 1/8, and 1/16).
However, the operating clock frequency for peripherals cannot exceed 25 MHz.
❍
Others
• Packages: QFP-100, LQFP-100, FBGA-112
• CMOS technology: 0.5
µ
m
• Power supply: 3.3 V plus or minus 0.3 V
• 254-kilobyte flash ROM: Can be read, written, and erased by a single power supply.