Filter
Top Products
195
4.18 Internal Clock Multiplication (Clock Doubler)
Figure 4.18-2 Example of Timing for 1X Clock (BW-16bit, Access-Word Read)
Internal clock
Internal instruction
Internal instruction
CLK output
External address bus
External data bus
External RDX
PrefetchExternal fetch (instruction fetch)
address
data
N
N
D
D + 2
D + 2
N + 4
D D + 2
N + 2