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APPENDIX E Instructions
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32-Bit Delayed-Branch Macro Instructions
2) When label32-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
Bxcc false xcc is the exclusion condition of cc.
LDI:32 #label32,Ri
JMP @Ri
false:
Table E.1-17 32-Bit Delayed-Branch Macro Instructions
Mnemonic Operation Remarks
*CALL32:D label32,Ri Next instruction address+2-->RP,
label32-->PC
Ri:Temporary register (See Reference 1.)
*BRA32:D label32,Ri
*BEQ32:D label32,Ri
label32-->PC
if(Z==1) then label32-->PC
Ri:Temporary register (See Reference 2.)
Ri:Temporary register (See Reference 3.)
*BNE32:D label32,Ri
*BC32:D label32,Ri
*BNC32:D label32,Ri
*BN32:D label32,Ri
*BP32:D label32,Ri
*BV32:D label32,Ri
*BNV32:D label32,Ri
*BLT32:D label32,Ri
*BGE32:D label32,Ri
*BLE32:D label32,Ri
*BGT32:D label32,Ri
*BLS32:D label32,Ri
*BHI32:D label32,Ri
s/Z==0
s/C==1
s/C==0
s/N==1
s/N==0
s/V==1
s/V==0
s/V xor N==1
s/V xor N==0
s/(V xor N) or Z==1
s/(V xor N) or Z==0
s/C or Z==1
s/C or Z==0
[Reference 1] CALL32:D
1) When label32-PC-2 is from -0x800 to +0x7fe, an instruction is created as follows:
CALL:D label12
2) When label32-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:32 #label32,Ri
CALL:D @Ri
[Reference 2] BRA32:D
1) When label32-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
BRA:D label9
2) When label32-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:32 #label32,Ri
JMP:D @Ri
[Reference 3] Bcc32:D
1) When label32-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
Bcc:D label9