Fujitsu FR30 Computer Hardware User Manual


 
206
CHAPTER 5 I/O PORTS
23 P81 P81 EPCR0 (BRE bit)
0: P81
1: BGRNTX
BGRNTX
24 P82 P82 EPCR0 (BRE bit)
0: P82
1: BRQ
BRQ
25 P83 P83 EPCR0 (RDXE bit)
0 : P83
1 : RDX
RDX
Table 5.4-1 External Bus Functions to be Selected (1/4)
Pin No. Pin code Initial value Switch-over register
Table 5.4-2 External Bus Functions to be Selected (2/4)
Pin No. Pin code Initial value Switch-over register
26 to 27 P84 to P85 P84, P85 Function automatically switches
according to the mode set by MD0 to
MD2, AMD0 to AMD5, and M0 to M1.
Single chip: P84 and P85
8 bits: WR0X and P85
16 bits: WR0X and WR1X
WR0X, WR1X
14 to 12 PA 0 to PA2 PA 0 to PA2 EPCR0 (C0E0 to C0E2 bits)
0: PA0 to PA2
1: CS0X to CS2X
CS0X to CS2X
11 PA3 PA3 EPCR0 (C0E3 bit) and DATCR
(EPSE1 and EPDE1 bits)
COE3, EPSE1, EPDE1 000:PA3
100: CS3X
Others: E0P1
CS3X
E0P1
10 to 9 PA4 to PA5 PA4 to PA5 EPCR0 (C0E4 to C0E5 bits)
0 : PA4 to PA5
1: CS4X to CS5X
CS4X to CS5X
8 PA6 PA6 EPCR0 (CKE bit)
0: PA6
1: CLK
CLK
99 to 100
1 to 2
PB0 to PB3 PB0 to PB3 DSCR (RS0E to DW1E bits)
0: PB0 to PB7
1: RAS0 to DW0X
RAS0
CS0L
CS0H
DW0X
3 PB4 PB4 DSCR (RS1E bit) and DATCR
(EPSE2, EPDE2 bits)
RS1E, EPSE2, EPDE2 000: PB4
100: RAS1
Other: EOP2
RAS1
E0P2