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CHAPTER 4 BUS INTERFACE
//External bus access
ldi:20 #0x626,r1 // rfcr register address setting
sth r0,@r1 // write to rfcr register
init_asr ldi:32 #0x0013001,r0 // asr1 and amr1 register setting values
ldi:32 #0x0015001,r1 // asr2, amr2 register setting values
ldi:32 #0x0017001,r2 // asr3, amr3 register setting values
ldi:32 #0x0019001,r3 // asr4, amr4 register setting values
ldi:32 #0x001b001,r4 // asr5, amr5 register setting values
ldi:20 #0x60c,r5 // asr1 and amr1 register address setting
ldi:20 #0x610,r6 // asr2, amr2 register address setting
ldi:20 #0x614,r7 // asr3, amr3 register address setting
ldi:20 #0x618,r8 // asr4, amr4 register address setting
ldi:20 #0x61C,r9 // asr5, amr5 register address setting
st r0,@r5 // Write to asr1 and amr1 registers
st r1,@r6 // Write to asr2 and amr2 registers
st r2,@r7 // Write to asr3 and amr3 registers
st r3,@r8 // Write to asr4 and amr4 registers
st r4,@r9 // Write to asr5 and amr5 registers
init_ler ldi:8 #0x02,r0 // CS2 little endian
ldi:20 #0x7fe,r1 // ler register address setting
stb r0,@r1 // Write to ler register
init_modr ldi:8 #0x80,r0 // External ROM external bus
ldi:20 #0x7ff,r1 // modr register address setting
stb r0,@r1 // Write to modr register
adr_set ldi:32 #0x00136da0, r0 // CS1 address
ldi:32 #0x00151300, r1 // CS2 address
ldi:32 #0x00196434, r2 // CS4 address (within the page)
ldi:32 #0x0019657c, r3 // CS4 address (within the page)
ldi:32 #0x00196600, r4 // CS4 address (outside of the page)
ldi:32 #0x001a6818, r5 // CS5 address (within the page)