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APPENDIX E Instructions
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32-Bit Standard Branch Macro Instructions
2) When label20-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
Bxcc false xcc: Counter condition of cc
LDI:20 #label20,Ri
JMP:D @Ri
false:
Table E.1-16 32-Bit Standard Branch Macro Instructions
Mnemonic Operation Remarks
*CALL32 label32,Ri Next instruction address-->RP,
label32-->PC
Ri:Temporary register (See Reference 1.)
*BRA32 label32,Ri
*BEQ32 label32,Ri
label32-->PC
if(Z==1) then label32-->PC
Ri:Temporary register (See Reference 2.)
Ri:Temporary register (See Reference 3.)
*BNE32 label32,Ri
*BC32 label32,Ri
*BNC32 label32,Ri
*BN32 label32,Ri
*BP32 label32,Ri
*BV32 label32,Ri
*BNV32 label32,Ri
*BLT32 label32,Ri
*BGE32 label32,Ri
*BLE32 label32,Ri
*BGT32 label32,Ri
*BLS32 label32,Ri
*BHI32 label32,Ri
s/Z==0
s/C==1
s/C==0
s/N==1
s/N==0
s/V==1
s/V==0
s/V xor N==1
s/V xor N==0
s/(V xor N) or Z==1
s/(V xor N) or Z==0
s/C or Z==1
s/C or Z==0
[Reference 1] CALL32
1) When label32-PC-2 is from -0x800 to +0x7fe, an instruction is created as follows:
CALL label12
2) When label32-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:32 #label32,Ri
CALL @Ri
[Reference 2] BRA32
1) When label32-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
BRA label9
2) When label32-PC-2 is outside of the range in 1) and includes an external reference
symbol, an instruction is created as follows:
LDI:32 #label32,Ri
JMP @Ri
[Reference 3] Bcc32
1) When label32-PC-2 is from -0x100 to +0xfe, an instruction is created as follows:
Bcc label9