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CHAPTER 15 DMAC
■
Transfer Stop in Continuous Transfer Mode (When Both Addresses are Changed) for 16-Bit or 8-Bit
Data
❍
Transfer source area: external, transfer destination area: external
❍
Transfer source area: external, transfer destination area: internal RAM
❍
Transfer source area: internal RAM, transfer destination area: external
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
W
D
D
S
S
W
#2L
#2L
#2H
#2H
W W
D
D
W
#0H
#0H
W
#1L
#1L
#1H
#1H
W
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
S
S #0H
#0HS
S
W W
#2L
#2L
#2H
#2H
WW
#1L
#1L
#1H
#1H
W
CLK
DREQn
Addr pin
Data pin
RDXD
WRnX
DACK
EOP
W
D
D
DD
DD
WW
#0H
#0H
W W
#2L
#2L
#2H
#2H
WW
#1L
#1L
#1H
#1H
W