Fujitsu FR30 Computer Hardware User Manual


 
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2.3 Programming Model
Program status (PS)
The program status register holds the program status in three parts, CCR, SCR, and ILM. See
Section 2.3.3 for more information.
The undefined bits are all reserved. When the register is read, 0 is always read from these bits.
No data can be written to this register.
Table base register (TBR)
The table base register holds the first address of the vector table used for EIT processing.
The initial value after resetting is 000FFC00
H
.
Return pointer (RP)
The return pointer register holds the address to which control returns from a subroutine.
When the CALL instruction is executed, the PC value is transferred to the RP.
When the RET instruction is executed, the RP value is transferred to the PC.
The initial value after resetting is undefined.
System stack pointer (SSP)
SSP stands for system stack pointer.
When the S flag is 0, the SSP functions as R15.
The SSP can be specified explicitly.
It can also be used as a stack pointer to specify the stack for saving the PS and PC when EIT
occurs.
The initial value after resetting is 00000000
H.
User stack pointer (USP)
USP stands for user stack pointer.
When the S flag is 1, the USP functions as R15.
The USP can be specified explicitly.
The initial value after resetting is undefined.
The USP cannot be used for the RETI instruction.
Multiplication/division result register (MDH/MDL)
The MDH and MDL are each 32 bits long.
The initial value after resetting is undefined.
[Multiplication]
When 32-bit data is multiplied by 32-bit data, the resultant 64-bit data is stored in the
multiplication/division result register as follows:
MDH: 32 high-order bits
MDL: 32 low-order bits
The result of multiplying 16 bits by 16 bits is stored as follows:
MDH: Undefined
MDL: Resultant 32-bit data