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APPENDIX C Pin Status for Each CPU Status
Table C-3 Pin Status for 16-bit External Bus Length and 2CA1WR Mode
Pin name Function During sleep During stop Bus release
(BGRNT)
Reset time
HIZX=0 HIZX=1
P20 to P27 D16-23 Output retained
or Hi-Z
Output retained
or Hi-Z
Output Hi-Z/
Input fixed to 0
Output Hi-Z
- D24-31
- A00-15 Output retained
(Address
output)
Output retained
(Address
output)
FF
H
output
P60 to P67 A16-23 P: Previous
status retained
F: Address
output
P: Previous
status retained
F: Address
output
-A24,
EOP0
Previous status
retained
Previous status
retained
P80 RDY P: Previous
status retained
F: RDY input
P, F: Previous
status retained
P: Previous
status
retained
F: RDY input
P81 BGRNTX P: Previous
status retained
F: H output
P, F: Previous
status retained
L output
P82 BRQ P: Previous
status retained
F: BRQ input
P, F: Previous
status retained
BRQ input
- RDX Previous status
retained
Previous status
retained
H output
-WR0X
P85 WR1X P: Previous
status retained
F: H output
P, F: Previous
status retained
H output
- CS0X Previous status
retained
H output L output
PA1 to
PA2
CS1X-
CS2X
P: Previous
status retained
F: CS output
P: Same as left
F: H output
H output
PA3 CS3X,
EOP1
P: Previous
status retained
F: CS/EOP
output
P: Same as left
F: H output/
Previous status
retained
PA4 to
PA5
CS4X-
CS5X
P: Previous
status retained
F: CS output
P: Same as left
F: H output