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4.16 Relationship between Data Bus Widths and Control Signals
❍
16-bit data bus (using 2 DRAMs)
Figure 4.16-19 Example of Connection between MB91F109 and Two 8-Bit Output DRAMs (16-Bit Data
Bus)
This LSI
COLUMN Address A08 A07 A06 A05 A04 A03 A02 A01 A00
ROW Address A16 A15 A14 A13 A12 A11 A10 A09 A08
External pin A08 A07 A06 A05 A04 A03 A02 A01 A00
A07 A06 A05 A04 A03 A02 A01 A00 RAS,CASL,WE (RAS,CAS,WEL)
D07-00 D31-24
2 DRAMs
A07 A06 A05 A04 A03 A02 A01 A00 RAS,CASH,WE (RAS,CAS,WEH)
D07-00 D23-16
( ): Values in parentheses are for 1CAS/2WE.
8
8