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Figure 14.10-1 One-Shot Operation Timing Chart (Trigger Restart Disabled) ................................................ 318
Figure 14.10-2 One-Shot Operation Timing Chart (Trigger Restart Enabled) ................................................ 318
Figure 14.11-1 Causes of Interrupts and Their Timing (PWM Output: Normal Polarity) ................................ 319
Figure 14.12-1 Example of Keeping PWM Output at a Lower Level ............................................................... 320
Figure 14.12-2 Example of Keeping PWM Output at a High Level ................................................................. 320
Figure 15.1-1 DMAC Registers ..................................................................................................................... 324
Figure 15.1-2 DMAC Block Diagram ............................................................................................................. 325
Figure 16.1-1 Flash Memory Registers ......................................................................................................... 352
Figure 16.2-1 Block diagram of the Flash Memory ....................................................................................... 354
Figure 16.4-1 Memory Map and Sector Configuration .................................................................................. 357
Figure 16.7-1 Structure of the Hardware Sequence Flag ............................................................................. 364