Filter
Top Products
389
APPENDIX C Pin Status for Each CPU Status
PF4 SO1,
TRG3
Previous status
retained
Previous status
retained
Output Hi-Z/
Input fixed to 0
Previous status
retained
Output Hi-Z/
Input
allowed for
all pins
PF5 SI2,
OCPA1
PF6 SO2,
OCPA2
PF7 OCPA0,
ATGX
Table C-3 Pin Status for 16-bit External Bus Length and 2CA1WR Mode (Continued)
Pin name Function During sleep During stop Bus release
(BGRNT)
Reset time
HIZX=0 HIZX=1
P: when a general-purpose port is specified, F: when the specified function is selected
*1 Selfrefresh status is entered at selfrefresh start time. When selfrefresh is cleared, the
previous value is retained.