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8 ELECTRICAL CHARACTERISTICS
S1C33L03 PRODUCT PART EPSON A-97
A-1
A-8
4-bit single monochrome panel timing
FPFRAME
FPLINE
DRDY (MOD)
FPDAT[7:4]
VDP VNDP
FPLINE
DRDY (MOD)
FPSHIFT
FPDAT7
FPDAT6
FPDAT5
FPDAT4
Line 1
1-1 1-5 1-317
1-2 1-6 1-318
1-3 1-7 1-319
1-4 1-8 1-320
Line 2 Line 3 Line 1 Line 2Line 4 Line 239 Line 240
HDP HNDP
∗ Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 320 × 240 panel
For this timing diagram FPSMASK (D2/0x39FFE1) is set to "1"
VDP = Vertical Display Period = LDVSIZE[9:0] + 1 (lines)
LDVSIZE[9:0] (0x39FFE5, D[1:0]/0x39FFE6)
VNDP = Vertical Non-Display Period = VNDP[5:0] (lines)
VNDP[5:0] (D[5:0]/0x39FFEA)
HDP = Horizontal Display Period = (LDHSIZE[5:0] + 1) × 16 (Ts)
LDHSIZE[5:0] (D[5:0]/0x39FFE4)
HNDP = Horizontal Non-Display Period = (HNDP[4:0] + 4) × 8 (Ts)
HNDP[4:0] (D[4:0]/0x39FFE7)