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IV ANALOG BLOCK: A/D CONVERTER
B-IV-2-12 EPSON S1C33L03 FUNCTION PART
ADF: Conversion-complete flag (D3) / A/D enable register (0x40244)
Indicates that A/D conversion has been completed.
Read "1": Conversion completed
Read "0": Being converted or standing by
Write: Invalid
This flag is set to "1" when A/D conversion is completed, and the converted data is stored in the data register and is
reset to "0" when the converted data is read out. When A/D conversion is performed in multiple channels, if the
next A/D conversion is completed while ADF = "1" (before the converted data is read out), the data register is
overwritten with the new conversion results, causing an overrun error to occur. Therefore, ADF must be reset by
reading out the converted data before the next A/D conversion is completed.
At initial reset, ADF is set to "0" (being converted or standing by).
ADE: A/D enable (D2) / A/D enable register (0x40244)
Enables the A/D converter (readied for conversion).
Write "1": Enabled
Write "0": Disabled
Read: Valid
When ADE is set to "1", the A/D converter is enabled, meaning it is ready to start A/D conversion (i.e., ready to
accept a trigger). When ADE = "0", the A/D converter is disabled, meaning it is unable to accept a trigger.
Before setting the conversion mode, start/end channels, etc. for the A/D converter, be sure to reset ADE to "0".
This helps to prevent the A/D converter from operating erratically.
At initial reset, ADE is set to "0" (disabled).
ADST: A/D conversion control/status (D1) / A/D enable register (0x40244)
Controls A/D conversion.
Write "1": Software trigger
Write "0": A/D conversion is stopped
Read: Valid
If A/D conversion is to be started by a software trigger, set ADST to "1". If any other trigger is used, ADST is
automatically set to "1" by the hardware.
ADST remains set while A/D conversion is underway.
In normal mode, upon completion of A/D conversion in selected channels, ADST is reset to "0" and the A/D
conversion circuit is turned off. To stop A/D conversion during operation in continuous mode, reset ADST by
writing "0".
When ADE = "0" (A/D conversion disabled), ADST is fixed to "0", with no trigger accepted. However, when "0"
is written to ADE during A/D conversion, A/D conversion cannot be terminated.
At initial reset, ADST is set to "0" (A/D conversion stopped).
OWE: Overwrite-error flag (D0) / A/D enable register (0x40244)
Indicates that the converted data has been overwritten.
Read "1": Overwritten
Read "0": Normal
Write "1": Invalid
Write "0": Flag is set
During A/D conversion in multiple channels, if the conversion results for the next channel are written to the
converted-data register (overwritten) before the converted data is read out to reset the conversion-complete flag
ADF that has been set through conversion of the preceding channel, OWE is set to "1". When ADF is reset,
because this means that the converted data has been read out, OWE is not set.
Once OWE is set to "1", it remains set until it is reset by writing "0" in the software.
At initial reset, OWE is set to "0" (normal).