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VI SDRAM CONTROLLER BLOCK: INTRODUCTION
S1C33L03 FUNCTION PART EPSON B-VI-1-1
A-1
B-VI
Intro
VI-1 INTRODUCTION
The SDRAM controller block provides a SDRAM interface that allows direct connection of external SDRAM
chips via the BCU.
CORE_PAD
Pads
C33_SBUS
C33 Core Block
C33 LCD Controller Block
Pads
PERI_PAD
Pads
C33_PERI
(Prescaler, 8-bit timer, 16-bit timer,
Clock timer, Serial interface, Ports)
C33 Peripheral BlockC33 Analog Block
C33_CORE
(CPU, BCU, ITC, CLG, DBG)
C33_ADC
(A/D converter)
C33 Internal Memory Block
Internal RAM
(Area 0)
Internal ROM
(Area 10)
C33 DMA Block
C33_DMA
(IDMA, HSDMA)
C33_SDRAMC
(SDRAM interface)
C33_LCDC
(LCD panel interface)
C33 SDRAM Controller Block
Figure 1.1 SDRAM Controller Block
Note: Internal ROM is not provided in the S1C33L03.