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CHAPTER 8 LOW-POWER CONSUMPTION MODE
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Timebase timer mode
The timebase timer mode operates the oscillation clock (HCLK), sub-clock (SCLK), timebase timer, watch
timer, and low voltage detection circuit only. All peripheral functions other than the timebase timer, watch
timer, and low voltage detection circuit stop.
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Stop mode
The stop mode stops the oscillation clock (HCLK) and sub-clock (SCLK) during operation in each clock
mode, and all functions other than low voltage detection circuit stop. Data can be retained at the lowest
power consumption.
Note:
When the clock mode is switched, do not switch to other clock mode and low-power consumption mode
before this switching is completed. Confirm the completion of clock mode switching by referring to the
MCM and SCM bits of the clock selection register (CKSCR).
If the mode is switched to other clock mode and low-power consumption mode before completion of
switching, the mode may not be switched.