Fujitsu F2MCTM-16LX Computer Hardware User Manual


 
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CHAPTER 21 CAN CONTROLLER
21.4 Classifying CAN Controller Registers
There are 3 types of CAN controller registers;
Overall control registers
Message buffer control registers
Message buffers
Overall Control Registers
The overall control registers are the following 4 registers;
Control status register (CSR)
Last event indicator register (LEIR)
Receive and transmit error counter (RTEC)
Bit timing register (BTR)
Message Buffer Control Registers
The message buffer control registers are the following 14 registers;
Message buffer valid register (BVALR)
IDE register (IDER)
Transmission request register (TREQR)
Transmission RTR register (TRTRR)
Remote frame receiving wait register (RFWTR)
Transmission cancel register (TCANR)
Transmission complete register (TCR)
Transmission interrupt enable register (TIER)
Reception complete register (RCR)
Remote request receiving register (RRTRR)
Receive overrun register (ROVRR)
Reception interrupt enable register (RIER)
Acceptance mask select register (AMSR)
Acceptance mask registers 0 and 1 (AMR0 and AMR1)
Message Buffers
The message buffers are the following 3 registers;
ID register x (x = 0 to 15) (IDRx)
DLC register x (x = 0 to 15) (DLCRx)
Data register x (x = 0 to 15) (DTRx)