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APPENDIX
APPENDIX A I/O Maps
Table A-1 lists addresses to be assigned to the registers in the peripheral blocks.
■ I/O Maps (00XX Addresses)
Table A-1 I/O Map (1/5)
Address Register
Abbreviation
Access Peripheral Initial value
000000
H
to
000001
H
Reserved
000002
H
Port 2 data register PDR2 R/W Port 2
XXXXXXXX
B
000003
H
Reserved
000004
H
Port 4 data register PDR4 R/W Port 4
XXXXXXXX
B
000005
H
Port 5 data register PDR5 R/W Port 5
XXXXXXXX
B
000006
H
Port 6 data register PDR6 R/W Port 6
XXXXXXXX
B
000007
H
Reserved
000008
H
Port 8 data register PDR8 R/W Port 8
XXXXXXXX
B
000009
H
to
00000A
H
Reserved
00000B
H
Analog input enable port 5 ADER5 R/W Port 5, A/D
1 1 1 1 1 1 1 1
B
00000C
H
Analog input enable port 6 ADER6 R/W Port 6, A/D
1 1 1 1 1 1 1 1
B
00000D
H
Reserved
00000E
H
Input level select register0 ILSR0 R/W Ports
XXXXXXXX
B
00000F
H
Input level select register1 ILSR1 R/W Ports
XXXXXXXX
B
000010
H
Reserved
000011
H
000012
H
Port 2 direction register DDR2 R/W Port 2
0 0 0 0 0 0 0 0
B
000013
H
Reserved
000014
H
Port 4 direction register DDR4 R/W Port 4
XXX 0 0 0 0 0
B
000015
H
Port 5 direction register DDR5 R/W Port 5
0 0 0 0 0 0 0 0
B
000016
H
Port 6 direction register DDR6 R/W Port 6
0 0 0 0 0 0 0 0
B
000017
H
Reserved
000018
H
Port 8 direction register DDR8 R/W Port 8
0 0 0 0 0 0 X 0
B