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73
CHAPTER 3 INTERRUPTS
Figure 3.6-1 Occurrence and Release of Software Interrupt
(1) The software interrupt instruction is executed.
(2) Special CPU registers in the register file are saved according to the microcode corresponding to the
software interrupt instruction.
(3) The interrupt processing is completed with the RETI instruction in the user interrupt processing
routine.
■ Others
When the program bank register (PCB) is FF
H
, the CALLV instruction vector area overlaps the table of the
INT #vct8 instruction. When designing software, ensure that the CALLV instruction does not use the same
address as that of the #vct8 instruction.
"Table D-2 Interrupt Causes, Interrupt Vectors, and Interrupt Control Registers" in APPENDIX D shows
the relationship of interrupt cause, interrupt vector, and interrupt control register in the MB90360 series.
RAM
IR
PS
F
2
MC-16LX • CPU
F
2
MC-16LX bus
Save
Register file
Micro code
Queue
Fetch
Instruction bus
B unit
PS : Processor status
I : Interrupt enable flag
ILM : Interrupt level mask register
IR : Instruction register
B unit : Bus interface unit
SI
(1)
(2)