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CHAPTER 8 LOW-POWER CONSUMPTION MODE
identified according to the settings of the I flag in the condition code register (CCR), the interrupt
level mask register (ILM), and the interrupt control register (ICR). In the sub-watch mode, no
oscillation stabilization wait time is generated and the interrupt request is identified immediately
after return from the watch mode.
• When the CPU is not ready to accept any interrupt request, the next instruction to the currently
executing instruction is executed.
• When the CPU is ready to accept any interrupt request, it immediately branches to the interrupt
processing routine.
Note:
When interrupt processing is executed, the CPU normally executes the instruction following the
instruction in which the watch mode has been specified. The CPU then proceeds to interrupt processing.