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CHAPTER 21 CAN CONTROLLER
The relationship between PSC = PSC5 to PSC0, TSI = TS1.3 to TS1.0, TS2 = TS2.2 to TS2.0, and RSJ =
RSJ1, RSJ0
RSJ1 and RSJ0 is shown below.
CLK: input clock (CLK)
TQ: time quanta
BT: bit time
SYNC_SEG: synchronous segment
TSEG1 and TSEG2: time segment 1 and 2
resynchronization jump width [(RSJ1 and RSJ0) +1] frequency division
For correct operation, the following conditions should be met.
In order to meet the bit timing requirements defined in the CAN specification, additions have to be met,
e.g. the propagation delay has to be considered.
TQ = (PSC + 1) x CLK
BT = SYNC_SEG + TSEG1 + TSEG2
= (1 + (TS1 + 1) + (TS2 +1)) x TQ
= (3 + TS1 +TS2) x TQ
RSJW = (RSJ + 1) x TQ
For 1 PSC 63:
TSEG1 2TQ
TSEG1 RSJW
TSEG2 2TQ
TSEG2 RSJW
For PSC = 0:
TSEG1 5TQ
TSEG2 2TQ
TSEG2 RSJW