Fujitsu F2MCTM-16LX Computer Hardware User Manual


 
657
INDEX
Precautions for Use of "DIV A,Ri" and
"DIVW A,RWi" Instructions.................. 52
Restrictions on Interrupt Disable Instructions
and Prefix Instructions........................... 51
Use of the "DIV A,Ri" and "DIVW A,RWi"
Instructions without Precautions ............ 53
Instruction List
F
2
MC-16LX Instruction List............................. 600
Instruction Map
Structure of Instruction Map ............................. 614
Instruction Presentation
Description of Instruction Presentation Items and
symbols.............................................. 597
Instruction Types
Instruction Types ............................................. 577
Inter-CPU Connection
Inter-CPU Connection Method.......................... 421
Internal Clock Mode
Internal Clock Mode......................................... 238
Operation in Internal Clock Mode...................... 255
Program Example in Internal Clock Mode.......... 263
Setting of Internal Clock Mode.......................... 254
Interrupt
16-bit I/O Timer Interrupt and EI
2
OS................. 228
8-/10-bit A/D Converter Interrupt and EI
2
OS...... 358
Cancellation of Standby Mode by Interrupt ........ 157
Correspondence between 16-bit Reload Timer
Interrupt and EI
2
OS............................. 251
Correspondence between Timebase Timer Interrupt
and EI
2
OS.......................................... 187
Generation of Interrupt from 8-/10-bit A/D Converter
.......................................................... 345
Hardware Interrupt Operation.............................. 68
Hardware Interrupts ..................................... 56, 67
Interrupt Disable Instructions .............................. 51
Interrupt Flow.................................................... 65
Interrupt Number ............................................... 85
Interrupts of 16-bit Reload Timer ...................... 251
Interrupt of 8-/16-bit PPG Timer ....................... 299
Interrupts of 8-/16-bit PPG Timer...................... 299
Interrupt of A/D Converter................................ 358
Interrupt of Timebase Timer ............................. 187
LIN-UART Interrupts....................................... 406
LIN-UART Interrupts and EI
2
OS ...................... 408
Multiple Interrupts ............................................. 71
Occurrence and Release of Hardware Interrupt
............................................................ 69
Reception Interrupt Generation and Flag Set Timing
.......................................................... 409
Restrictions on Interrupt Disable Instructions and
prefix Instructions ................................. 51
Software Interrupt Operation............................... 72
Software Interrupts....................................... 57, 72
Structure of Hardware Interrupt........................... 67
Structure of Software Interrupts........................... 72
Transmission Interrupt Generation and Flag Set
Timing................................................411
Watch Timer Interrupt.......................................275
Watch Timer Interrupt and EI
2
OS Transfer Function
..........................................................275
Interrupt Causes
Interrupt Causes,interrupt Vectors,and Interrupt
control Registers..................................646
Interrupt Control Register
Interrupt Causes,interrupt Vectors,and Interrupt
control Registers..................................646
Interrupt Control Register (ICR) ..........................61
Interrupt Disable Instructions
Interrupt Disable Instructions...............................51
Restrictions on Interrupt Disable Instructions
and Prefix Instructions ...........................51
Interrupt Number
Details of Pins and Interrupt Number..................212
Details of Pins and Interrupt Numbers ................316
Interrupt Number................................................85
Interrupt Request
Generation of Interrupt Request from 16-bit I/O Timer
..........................................................216
Generation of Interrupt Request from 16-bit Reload
Timer .................................................244
Generation of Interrupt Request from 8-/16-bit
PPG Timer..........................................291
Generation of Interrupt Request from Timebase Timer
..........................................................184
Generation of Interrupt Request from Watch Timer
..........................................................272
Interrupt Vector
Interrupt Causes,interrupt Vectors,and Interrupt
control Registers..................................646
Interrupt Vector..................................................59
List of Interrupt Vectors..............................72, 644
Interval Timer
Interval Timer Function.............180, 188, 268, 276
IPCP
Input Capture Register (IPCP) ...........................223
ISCS
EI
2
OS Status Register (ISCS) ..............................78
ISD
Extended Intelligent I/O Service Descriptor (ISD)
............................................................76
L
Last Event Indicator Register
Last Event Indicator Register (LEIR)..................458
LEIR
Last Event Indicator Register (LEIR)..................458
LIN Master Device
LIN-UART as LIN Master Device .....................439