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APPENDIX C Timing Diagrams in Flash Memory Mode
■ Chip Erase/sector Erase Command Sequence
Figure C-4 Timing Diagram for Write Access (chip erasing/sector erasing)
Notes:
• SA is the sector address at erasing sector.
• The address is FxAAAA
H
at erasing sector.
• "Fx" in "FxAAAA" described as address is any of F.
AA
H
SA*
55
H
80
H
AA
H
55
H
10
H
/30
H
t
AH
t
AS
t
GHWL
t
DH
t
WPH
t
WP
t
CS
t
DS
t
VCS
AQ18 to
AQ0
CE
OE
WE
DQ7 to DQ0
V
CC
FxAAAA
H
Fx5555
H
FxAAAA
H
FxAAAA
H
Fx5555
H