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CHAPTER 2 CPU
Figure 2.5-1 is an example of a memory space divided into register banks.
Figure 2.5-1 Physical Addresses of Each Space
Table 2.5-1 Default Space
Default space Addressing mode
Program space PC indirect, program access, branch
Data space Addressing mode using @RW0, @RW1, @RW4, or @RW5, @A, addr16, and dir
Stack space Addressing mode using PUSHW, POPW, @RW3, or @RW7
Additional space Addressing mode using @RW2 or @RW6
FFH
B3H
92H
68H
4BH
FFFFFFH
FF0000H
B3FFFFH
920000H
68FFFFH
680000H
4BFFFFH
4B0000H
000000H
92FFFFH
B30000H
: PCB (Program bank register)
: ADB (Additional bank register)
: USB (User stack bank register)
: DTB (Data bank register)
: SSB (System stack bank register)
Program space
Additional space
User stack space
Data space
System stack space
Physical address