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CHAPTER 18 8-/10-BIT A/D CONVERTER
18.5.5 A/D-converted Data Protection Function
A/D conversion with the output of an interrupt request enabled activates the A/D
conversion data protection function.
■ A/D-converted Data Protection Function in 8-/10-bit A/D Converter
The 8-/10-bit A/D converter has only one A/D data register (ADCR) where A/D-converted data is stored.
When the A/D conversion results are determined after the termination of A/D conversion, data in the A/D
data register is rewritten. Therefore, the A/D conversion results may be lost if the A/D conversion results
already stored are not read before data in the A/D data register is rewritten. The A/D-converted data
protection function in the 8-/10-bit A/D converter is activated to prevent data loss. This function
automatically causes A/D conversion to pause when an interrupt request is generated (ADCS:INT = 1) with
an interrupt request enabled (ADCS:INTE = 1).
●
A/D-converted data protection function when EI
2
OS not used
• When the A/D conversion results are stored in the A/D data register (ADCR) after the analog input is
A/D-converted, the interrupt request flag bit in the A/D control status register (ADCS: INT) is set to "1".
• The A/D conversion stops for data protection immediately before new data is overwritten to the A/D
data register if the interrupt request is enabled (ADCS: INTE = 1) while the interrupt request flag bit set
at termination of previous A/D conversion is set at the point that next A/D conversion is terminated.
• When the INT bit is set with an interrupt request from the A/D control status register enabled (ADCS:
INTE = 1), an interrupt request is generated. When the INT bit is cleared by the generated interrupt
processing, the pause of A/D conversion is cancelled.
●
A/D-converted data protection function when EI
2
OS used
• The A/D conversion stops for data protection immediately before new data is overwritten to the A/D
data register while the EI
2
OS function is used to transfer the A/D conversion results from the A/D data
register to memory when next A/D conversion is terminated. When A/D conversion pauses, the pause
flag bit in the A/D control status register (ADCS: PAUS) is set to "1".
• When the transfer of the A/D conversion results to memory by the EI
2
OS function is terminated, the
pause of A/D conversion is cancelled. If the A/D conversion is performed continuously, it is restarted. In
this case, the pause flag bit (ADCS:PAUS) is not cleared to "0" automatically. Clearing this bit writes 0
to it.
●
Processing flow of A/D conversion data protection function when EI
2
OS used
Figure 18.5-5 shows the processing flow of the A/D conversion data protection function when the EI
2
OS is
used.