Fujitsu F2MCTM-16LX Computer Hardware User Manual


 
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CHAPTER 11 TIMEBASE TIMER
11.7 Program Example of Timebase Timer
Programming examples for the timebase timer are shown below.
Program Example of Timebase Timer
Processing specification
The 2
12
/HCLK (HCLK: oscillation clock) interval interrupt is generated repeatedly. In this case, the
interval time is approximately 1.0 ms (at 4-MHz operation).
Coding example
ICR07 EQU 0000B7H ;
Timebase timer interrupt control register
TBTC EQU 0000A9H ;Timebase timer control register
TBOF EQU TBTC:3 ;Interrupt request flag bit
TBIE EQU TBTC:2 ;Interrupt enable bit
;-------Main program---------------------------------------
CODE CSEG
START: ;
Stack pointer(SP), already initialized
AND CCR,#0BFH ;Interrupt disable
MOV I:ICR07 #00H ;Interrupt level 0(highest)
MOV I:TBTC,#10000000B
;Upper 3 bis are fixed
;TBOF clear,
;Counter clear interval time
;2
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/HCLK selection
SETB I:TBIE ;Interrupt enable
MOV ILM,#07H ;Setting ILM in PS to level 7
OR CCR,#40H ;Interrupt enable
LOOP: MOV A,#00H ;No limit loop
MOV A,#01H
BRA LOOP
;-------Interrupt program------------------------------------
WARI:
CLRB I:TBIE ;Clear interrupt enable bit
CLRB I:TBOF ;Clear interrupt request flag
:
User processing
:
SETB I:TBIE ;Interrupt enable
RETI ;Recovery from interrupt processing
CODE ENDS
;-------Vector setting----------------------------------------
VECT CSEG ABS=0FFH
ORG 0FF98H ;Vector setting to interrupt number
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