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CHAPTER 24 512K-BIT FLASH MEMORY
24.6.2 Toggle Bit Flag (DQ6)
Like the data polling flag (DQ7), the toggle bit flag (DQ6) uses the toggle bit function to
post that the automatic algorithm is being executed or has terminated.
■ Toggle Bit Flag (DQ6)
Table 24.6-5 and Table 24.6-6 list the state transitions of the toggle bit flag.
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Write/chip erase
Continuous read-access during execution of the automatic write algorithm and chip erase algorithm causes
the flash memory to toggle the 1 or 0 state for every read cycle, regardless of the value at the address
specified by the address signal. Continuous read-access at the end of the automatic write algorithm and chip
erase algorithm causes the flash memory to stop toggling bit 6 and output bit 6 (DATA: 6) of the read value
of the address specified by the address signal.
Table 24.6-5 State Transition of Toggle Bit Flag (State change at normal operation)
Operating State Programming
→ Completed
Chip Erasing →
Completed
DQ6 Toggle → DATA:6 Toggle → Stop
Table 24.6-6 State Transition of Toggle Bit Flag (State change at abnormal operation)
Operating State Programming Chip Erasing
DQ6 Toggle Toggle