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CHAPTER 2 CPU
■ ROM area
●
Vector table area (address: FFFC00
H
to FFFFFF
H
)
This area is used as a vector table for reset/interrupt and CALLV vector.
This area is allocated at the highest addresses of the ROM area. The start address of the corresponding
processing routine is set as data in each vector table address.
●
Program area (address: FF0000
H
to FFFBFF
H
)
ROM is built in as an internal program area.
The size of internal ROM differs for each model.
■ RAM Area
●
Data area (address: From 000100
H
to 000CFF
H
(for 3K bytes))
The static RAM is built in as an internal data area.
The size of internal RAM differs for each model.
●
General-purpose register area (address: 000180
H
to 00037F
H
)
Auxiliary registers used for 8-bit, 16-bit, and 32-bit arithmetic operations and transfer are allocated in this
area.
Since this area is allocated to a part of the RAM area, it can be used as ordinary RAM.
When this area is used as a general-purpose register, general-purpose register addressing enables high-
speed access with short instructions.
●
Extended intelligent I/O service (EI
2
OS) descriptor area (address: 000100
H
to 00017F
H
)
This area retains the transfer modes, I/O addresses, transfer count, and buffer addresses.
Since this area is allocated to a part of the RAM area, it can be used as ordinary RAM.
■ I/O Area
●
Interrupt control register area (address: 0000B0
H
to 0000BF
H
)
The interrupt control registers (ICR00 to ICR15) correspond to all peripheral functions that have an
interrupt function. These registers set interrupt levels and control the extended intelligent I/O service
(EI
2
OS).
●
Peripheral function control register area (address: 000020
H
to 0000AF
H ,
0000C0
H
to 0000EF
H ,
007900
H
to 007FFF
H
)
This register controls the built-in peripheral functions and inputs and outputs data.
●
I/O port control register area (address: 000000
H
to 00001F
H
)
This register controls I/O ports, and inputs and outputs data.