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Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
6-18
Figure 6-6. Nonpipelined Address Write Cycles
A2488-02
LOCK#
D15:0
CLK2
BHE#, BLE#, A25:1
M/IO#, D/C#
RD#
READY#
Ti T1 T2 T1 T2 T2 Ti
Cycle 1
Nonpipelined
External
(Write)
[Late Ready]
Cycle 2
Nonpipelined
External
(Write)
[Early Ready]
Idle
CLKOUT
Idle
ADS#
NA#
REFRESH#
W/R#
End Cycle 1 End Cycle 2
WR#
LBA#
Valid 2
Valid 1
BS8#
Valid2
Valid1
Out 2
Out 1