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Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
18-14
18.5 DESIGN CONSIDERATIONS
This section outlines considerations for the test-logic unit.
• The JTAG Test-Logic Unit must be reset upon power-up using the TRST# pin. (To do this,
invert the RESET signal and send this inverted RESET to the TRST# pin). If this is not
done, the processor may power-up with the JTAG test-logic unit in control of the device
pins, and the system does not initialize properly.
• For system-level in-circuit emulation, use the HIGHZ instruction to enter ONCE mode. For
device-level in-circuit emulation, you assert the FLT# pin to enter ONCE mode. This
method can interfere with the test-logic unit’s parallel functions, although it does not affect
the shifting functions or the TDO output.