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CHAPTER 1
GUIDE TO THIS MANUAL
This manual describes the Intel386™ EX Embedded Processor. It is intended for use by hardware
designers familiar with the principles of microprocessors and with the Intel386 processor archi-
tecture.
This chapter is organized as follows:
• Manual Contents (see below)
• Notational Conventions (page 1-3)
• Special Terminology (page 1-4)
• Related Documents (page 1-5)
• Electronic Support Systems (page 1-6)
• Technical Support (page 1-7)
• Product Literature (page 1-8)
1.1 MANUAL CONTENTS
This manual contains 18 chapters and 5 appendixes, a glossary, and an index. This section sum-
marizes the contents of the remaining chapters and appendixes. The remainder of this chapter de-
scribes notational conventions and special terminology used throughout the manual and provides
references to related documentation.
Chapter 2 — Architectural Overview — describes the device features and some potential ap-
plications.
Chapter 3 — Core Overview — describes the differences between this device and the Intel386
™
SX processor core.
Chapter 4 — System Register Organization — describes the organization of the system regis-
ters, the I/O address space, address decoding, and addressing modes.
Chapter 5 — Device Configuration — explains how to configure the device for various appli-
cations.
Chapter 6 — Bus Interface Unit — describes the bus interface logic, bus states, bus cycles, and
instruction pipelining.
Chapter 7 — System Management Mode — describes Intel’s System Management Mode
(SMM).
Chapter 8 — Clock and Power Management Unit — describes the clock generation circuitry,
power management modes, and system reset logic.